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asm: fix parts of encoded instructions being overwritten

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This commit is contained in:
max 🍓
2025-01-15 17:39:15 +00:00
parent 4561208db5
commit ada0ff8c85
2 changed files with 38 additions and 38 deletions
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26
asm/include/ivy/asm/instr.h
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@@ -4,6 +4,32 @@
#include <ivy/misc.h>
#include <ivy/opcode.h>
#define R_MASK_OP 0x01800C03u
#define R_MASK_R1 0x000003FCu
#define R_MASK_R2 0x000FF000u
#define R_MASK_R3 0x01800C03u
#define R_MASK_D1 0xFE700000u
#define R_MASK_D2 0xFE7FF000u
#define R_MASK_D3 0xFE7FF3FCu
#define R_SET_OPCODE(i, op) \
(((i) & ~R_MASK_OP) | (op & 0x03u) | ((op & 0x0Cu) << 8) \
| ((op & 0x30u) << 19))
#define R_SET_R1(i, r) (((i) & ~R_MASK_R1) | ((r & 0xFFu) << 2))
#define R_SET_R2(i, r) (((i) & ~R_MASK_R2) | ((r & 0xFFu) << 12))
#define R_SET_R3(i, r) \
(((i) & ~R_MASK_R3) | ((r & 0x01u) << 22) | ((r & 0xFEu) << 24))
#define R_SET_D1(i, r) \
(((i) & ~R_MASK_D1) | ((r & 0x07u) << 20) | ((r & 0x3F8u) << 22))
#define R_SET_D2(i, r) \
(((i) & ~R_MASK_D2) | ((r & 0x7FFu) << 12) | ((r & 0x3F800u) << 14))
#define R_SET_D3(i, r) \
(((i) & ~R_MASK_D3) | ((r & 0xFFu) << 2) | ((r & 0x7FF00u) << 4) \
| ((r & 0x3F80000u) << 6))
enum ivy_instr_layout {
IVY_INSTR_X = 0,
IVY_INSTR_D,