From ada0ff8c8501971f49239298d8faca9072cd781e Mon Sep 17 00:00:00 2001 From: Max Wash Date: Wed, 15 Jan 2025 17:39:15 +0000 Subject: [PATCH] asm: fix parts of encoded instructions being overwritten --- asm/assembler/block.c | 50 +++++++++---------------------------- asm/include/ivy/asm/instr.h | 26 +++++++++++++++++++ 2 files changed, 38 insertions(+), 38 deletions(-) diff --git a/asm/assembler/block.c b/asm/assembler/block.c index e996dc9..58a600f 100644 --- a/asm/assembler/block.c +++ b/asm/assembler/block.c @@ -9,32 +9,6 @@ #include #include -#define R_MASK_OP 0x01800C03u -#define R_MASK_R1 0x000003FCu -#define R_MASK_R2 0x000FF000u -#define R_MASK_R3 0x01800C03u - -#define R_MASK_D1 0xFE700000u -#define R_MASK_D2 0xFE7FF000u -#define R_MASK_D3 0xFE7FF3FCu - -#define R_SET_OPCODE(i, op) \ - (((i) & ~R_MASK_OP) | (op & 0x03u) | ((op & 0x0Cu) << 8) \ - | ((op & 0x30u) << 19)) - -#define R_SET_R1(i, r) (((i) & ~R_MASK_R1) | ((r & 0xFFu) << 2)) -#define R_SET_R2(i, r) (((i) & ~R_MASK_R2) | ((r & 0xFFu) << 12)) -#define R_SET_R3(i, r) \ - (((i) & ~R_MASK_R3) | ((r & 0x01u) << 22) | ((r & 0xFEu) << 24)) - -#define R_SET_D1(i, r) \ - (((i) & ~R_MASK_D1) | ((r & 0x07u) << 20) | ((r & 0x3F8u) << 22)) -#define R_SET_D2(i, r) \ - (((i) & ~R_MASK_D2) | ((r & 0x7FFu) << 12) | ((r & 0x3F800u) << 14)) -#define R_SET_D3(i, r) \ - (((i) & ~R_MASK_D3) | ((r & 0xFFu) << 2) | ((r & 0x7FF00u) << 4) \ - | ((r & 0x3F80000u) << 6)) - struct block_assembler_scope { struct assembler_scope s_base; }; @@ -64,28 +38,28 @@ static enum ivy_status put_instr( case IVY_INSTR_X: break; case IVY_INSTR_D: - v = R_SET_D3(v, instr->i_arg[0]); + v |= R_SET_D3(v, instr->i_arg[0]); break; case IVY_INSTR_R1: - v = R_SET_R1(v, instr->i_arg[0]); + v |= R_SET_R1(v, instr->i_arg[0]); break; case IVY_INSTR_R1D: - v = R_SET_R1(v, instr->i_arg[0]); - v = R_SET_D2(v, instr->i_arg[1]); + v |= R_SET_R1(v, instr->i_arg[0]); + v |= R_SET_D2(v, instr->i_arg[1]); break; case IVY_INSTR_R2: - v = R_SET_R1(v, instr->i_arg[0]); - v = R_SET_R2(v, instr->i_arg[1]); + v |= R_SET_R1(v, instr->i_arg[0]); + v |= R_SET_R2(v, instr->i_arg[1]); break; case IVY_INSTR_R2D: - v = R_SET_R1(v, instr->i_arg[0]); - v = R_SET_R2(v, instr->i_arg[1]); - v = R_SET_D1(v, instr->i_arg[2]); + v |= R_SET_R1(v, instr->i_arg[0]); + v |= R_SET_R2(v, instr->i_arg[1]); + v |= R_SET_D1(v, instr->i_arg[2]); break; case IVY_INSTR_R3: - v = R_SET_R1(v, instr->i_arg[0]); - v = R_SET_R2(v, instr->i_arg[1]); - v = R_SET_R3(v, instr->i_arg[2]); + v |= R_SET_R1(v, instr->i_arg[0]); + v |= R_SET_R2(v, instr->i_arg[1]); + v |= R_SET_R3(v, instr->i_arg[2]); break; default: return IVY_ERR_INTERNAL_FAILURE; diff --git a/asm/include/ivy/asm/instr.h b/asm/include/ivy/asm/instr.h index 98f13ef..a611c6f 100644 --- a/asm/include/ivy/asm/instr.h +++ b/asm/include/ivy/asm/instr.h @@ -4,6 +4,32 @@ #include #include +#define R_MASK_OP 0x01800C03u +#define R_MASK_R1 0x000003FCu +#define R_MASK_R2 0x000FF000u +#define R_MASK_R3 0x01800C03u + +#define R_MASK_D1 0xFE700000u +#define R_MASK_D2 0xFE7FF000u +#define R_MASK_D3 0xFE7FF3FCu + +#define R_SET_OPCODE(i, op) \ + (((i) & ~R_MASK_OP) | (op & 0x03u) | ((op & 0x0Cu) << 8) \ + | ((op & 0x30u) << 19)) + +#define R_SET_R1(i, r) (((i) & ~R_MASK_R1) | ((r & 0xFFu) << 2)) +#define R_SET_R2(i, r) (((i) & ~R_MASK_R2) | ((r & 0xFFu) << 12)) +#define R_SET_R3(i, r) \ + (((i) & ~R_MASK_R3) | ((r & 0x01u) << 22) | ((r & 0xFEu) << 24)) + +#define R_SET_D1(i, r) \ + (((i) & ~R_MASK_D1) | ((r & 0x07u) << 20) | ((r & 0x3F8u) << 22)) +#define R_SET_D2(i, r) \ + (((i) & ~R_MASK_D2) | ((r & 0x7FFu) << 12) | ((r & 0x3F800u) << 14)) +#define R_SET_D3(i, r) \ + (((i) & ~R_MASK_D3) | ((r & 0xFFu) << 2) | ((r & 0x7FF00u) << 4) \ + | ((r & 0x3F80000u) << 6)) + enum ivy_instr_layout { IVY_INSTR_X = 0, IVY_INSTR_D,