Max Wash 5f2ad06fb0 x86_64: all intermediate page table entries now have PTE_USR set ...

this allows user-accessible page mappings to be created. for kernel memory
mappings, PTE_USR will only be cleared on the lowest-level table entry.

2026-02-08 13:03:41 +00:00

..

user

kernel: adjust formatting

2026-02-08 12:32:48 +00:00

x86_64

x86_64: all intermediate page table entries now have PTE_USR set

2026-02-08 13:03:41 +00:00