#include <socks/printk.h>
#include <socks/clock.h>
#include <socks/vm.h>
#include <socks/cpu.h>
#include <arch/acpi/io_apic.hpp>
#include <arch/acpi/local_apic.hpp>
#include <arch/acpi.h>
#include <arch/msr.h>
#include <arch/ports.h>
#include <arch/pit.h>

#define PIC1_DATA 0x21
#define PIC2_DATA 0xA1

#define IA32_APIC_BASE_MSR 0x1B
#define IA32_APIC_BASE_MSR_BSP 0x100
#define IA32_APIC_BASE_MSR_ENABLE 0x800

static int apic_enabled = 0;
static unsigned int bsp_id = (unsigned int)-1;

using namespace arch::acpi;

static struct queue io_apics;

extern "C" {
	/* defined in apic_ctrl.S */
	extern int check_apic(void);
}

static uintptr_t apic_get_base(void)
{
	return rdmsr(IA32_APIC_BASE_MSR);
}

static void apic_set_base(uintptr_t addr)
{
	wrmsr(IA32_APIC_BASE_MSR, addr);
}

static void disable_8259(void)
{
	/* mask all interrupts on PICs 1 and 2 */
	outportb(PIC1_DATA, 0xFF);
	outportb(PIC2_DATA, 0xFF);
}

kern_status_t local_apic_enable(struct acpi_madt *madt)
{
	apic_set_base(apic_get_base());
	local_apic::find(madt, local_apic::get());

	local_apic::get().write(0xF0, 0x1FF);
	local_apic::get().ack();

	return KERN_OK;
}

static io_apic *get_ioapic_for_irq(unsigned int vec)
{
	queue_foreach (io_apic, ioapic, &io_apics, io_entry) {
		if (vec >= ioapic->io_first_irq && vec < ioapic->io_first_irq + ioapic->io_nr_irq) {
			return ioapic;
		}
	}

	return nullptr;
}

static void configure_legacy_pic(void)
{
	printk("acpi: APIC unavailable");
	pit_start(HZ);
}

static void ioapic_init(uintptr_t base, unsigned int int_base)
{
	uint32_t *base_vaddr = (uint32_t *)vm_phys_to_virt(base);
	io_apic *apic = kmalloc_object(io_apic, VM_NORMAL, base_vaddr, int_base);

	//printk("acpi: I/O APIC at 0x%llx; base=%u, irqs=%u", base, int_base, apic->io_nr_irq);

	for (unsigned int i = 0; i < apic->io_nr_irq; i++) {
		apic->map_irq(i, 32 + int_base + i);
	}

	queue_push_back(&io_apics, &apic->io_entry);
}

static int lapic_clock_irq(void)
{
	if (this_cpu() == bsp_id) {
		clock_advance(1);
	}

	return 0;
}

static struct irq_hook lapic_clock_irq_hook = {
	{},
	lapic_clock_irq,
};

void local_apic_config_timer(void)
{
	local_apic& lapic = local_apic::get();

	lapic.write(local_apic::TIMER_DIV, 0x3);
	lapic.write(local_apic::TIMER_INITCOUNT, (uint32_t)-1);
	clock_wait(10);
	lapic.write(local_apic::LVT_TIMER, APIC_LVT_INT_MASKED);

	/* mask IRQ0 to block interrupts from the PIT. */
	io_apic *irq0_apic = get_ioapic_for_irq(0);
	irq0_apic->mask_irq(0);

	uint32_t total_ticks = 0xFFFFFFFF - lapic.read(local_apic::TIMER_CURCOUNT);

	/* convert to LAPIC ticks per kernel clock tick */
	total_ticks /= 10;

	lapic.write(local_apic::LVT_TIMER, IRQ0 | APIC_LVT_TIMER_MODE_PERIODIC);
	lapic.write(local_apic::TIMER_DIV, 0x3);
	lapic.write(local_apic::TIMER_INITCOUNT, total_ticks);
}

static void parse_legacy_irq_override(struct acpi_madt *madt)
{
	unsigned char *p = (unsigned char *)madt + sizeof *madt;
	unsigned char *madt_end = (unsigned char *)madt + madt->m_base.s_length;

	while (p < madt_end) {
		struct acpi_madt_record *rec = (struct acpi_madt_record *)p;
		struct acpi_madt_irqsrc_override*irq;
		io_apic *handler = nullptr;

		switch (rec->r_type) {
		case ACPI_MADT_IRQSRC_OVERRIDE:
			irq = (struct acpi_madt_irqsrc_override *)(rec + 1);
			handler = get_ioapic_for_irq(irq->irq_srcvec);
			handler->map_irq(irq->irq_srcvec, 32 + irq->irq_destvec);
			break;
		default:
			break;
		}

		p += rec->r_length;
	}
}

static void init_all_ioapic(struct acpi_madt *madt)
{
	unsigned char *p = (unsigned char *)madt + sizeof *madt;
	unsigned char *madt_end = (unsigned char *)madt + madt->m_base.s_length;

	while (p < madt_end) {
		struct acpi_madt_record *rec = (struct acpi_madt_record *)p;
		struct acpi_madt_ioapic *ioapic;

		switch (rec->r_type) {
		case ACPI_MADT_IOAPIC:
			ioapic = (struct  acpi_madt_ioapic *)(rec + 1);
			ioapic_init(ioapic->io_address, ioapic->io_intbase);
			break;
		default:
			break;
		}

		p += rec->r_length;
	}

	parse_legacy_irq_override(madt);
}

kern_status_t ap_apic_init(void)
{
	struct acpi_madt *madt = (struct acpi_madt *)acpi_find_sdt(ACPI_SIG_MADT);
	local_apic_enable(madt);

	//irq_enable();
	local_apic_config_timer();

	return KERN_OK;
}

/* only the bootstrap processor should call apic_init()
   all other APs should call ap_apic_init() instead */
kern_status_t apic_init(void)
{
	struct acpi_madt *madt = (struct acpi_madt *)acpi_find_sdt(ACPI_SIG_MADT);

	if (check_apic() == 0 || !madt) {
		configure_legacy_pic();
		return KERN_UNSUPPORTED;
	}

	bsp_id = this_cpu();
	init_all_ioapic(madt);

	local_apic_enable(madt);
        disable_8259();

	apic_enabled = 1;
	irq_enable();

	pit_start(HZ);

	local_apic_config_timer();
	pit_stop();

	hook_irq(IRQ0, &lapic_clock_irq_hook);

	return KERN_OK;
}

void irq_ack(unsigned int vec)
{
	if (apic_enabled) {
		local_apic::get().ack();
	} else {
		if (vec >= 40) {
			outportb(0xA0, 0x20);
		}

		outportb(0x20, 0x20);
	}

}