#include #include #include #include #include #include #include #include #include #define PIC1_DATA 0x21 #define PIC2_DATA 0xA1 #define IA32_APIC_BASE_MSR 0x1B #define IA32_APIC_BASE_MSR_BSP 0x100 #define IA32_APIC_BASE_MSR_ENABLE 0x800 static int apic_enabled = 0; using namespace arch::acpi; static uint32_t *lapic_base; static queue_t io_apics; extern "C" { /* defined in apic_ctrl.S */ extern int check_apic(void); } static uintptr_t apic_get_base(void) { return rdmsr(IA32_APIC_BASE_MSR); } static void apic_set_base(uintptr_t addr) { wrmsr(IA32_APIC_BASE_MSR, addr); } static void disable_8259(void) { /* mask all interrupts on PICs 1 and 2 */ outportb(PIC1_DATA, 0xFF); outportb(PIC2_DATA, 0xFF); } static void *find_lapic(struct acpi_madt *madt) { phys_addr_t local_apic = madt->m_lapic_ptr; unsigned char *p = (unsigned char *)madt + sizeof *madt; unsigned char *madt_end = (unsigned char *)madt + madt->m_base.s_length; while (p < madt_end) { struct acpi_madt_record *rec = (struct acpi_madt_record *)p; struct lapic_override_record *lapic; switch (rec->r_type) { case ACPI_MADT_LAPIC_OVERRIDE: lapic = (struct lapic_override_record *)(rec + 1); return vm_phys_to_virt(lapic->l_lapic_ptr); default: break; } p += rec->r_length; } return vm_phys_to_virt(local_apic); } kern_status_t local_apic_enable(void) { struct acpi_madt *madt = (struct acpi_madt *)acpi_find_sdt(ACPI_SIG_MADT); if (!madt) { return KERN_UNSUPPORTED; } apic_set_base(apic_get_base()); lapic_base = (uint32_t *)find_lapic(madt); local_apic lapic(lapic_base); lapic.write(0xF0, 0x1FF); lapic.ack(); printk("acpi: enabled local APIC on core %u", this_cpu()); return KERN_OK; } static io_apic *get_ioapic_for_irq(unsigned int vec) { queue_foreach (io_apic, ioapic, &io_apics, io_entry) { if (vec >= ioapic->io_first_irq && vec < ioapic->io_first_irq + ioapic->io_nr_irq) { return ioapic; } } return nullptr; } static void configure_legacy_pic(void) { printk("acpi: APIC unavailable, using 8259 PIC"); pit_start(10); } static void ioapic_init(uintptr_t base, unsigned int int_base) { uint32_t *base_vaddr = (uint32_t *)vm_phys_to_virt(base); io_apic *apic = kmalloc_object(io_apic, VM_NORMAL, base_vaddr, int_base); printk("acpi: I/O APIC at 0x%llx; base=%u, irqs=%u", base, int_base, apic->io_nr_irq); for (unsigned int i = 0; i < apic->io_nr_irq; i++) { apic->map_irq(i, 32 + int_base + i); } queue_push_back(&io_apics, &apic->io_entry); } static void parse_legacy_irq_override(struct acpi_madt *madt) { unsigned char *p = (unsigned char *)madt + sizeof *madt; unsigned char *madt_end = (unsigned char *)madt + madt->m_base.s_length; while (p < madt_end) { struct acpi_madt_record *rec = (struct acpi_madt_record *)p; struct acpi_madt_irqsrc_override*irq; io_apic *handler = nullptr; switch (rec->r_type) { case ACPI_MADT_IRQSRC_OVERRIDE: irq = (struct acpi_madt_irqsrc_override *)(rec + 1); printk("acpi: irq src=%u, dest=%u", irq->irq_srcvec, irq->irq_destvec); handler = get_ioapic_for_irq(irq->irq_srcvec); handler->map_irq(irq->irq_srcvec, 32 + irq->irq_destvec); break; default: break; } p += rec->r_length; } } static void init_all_ioapic(struct acpi_madt *madt) { unsigned char *p = (unsigned char *)madt + sizeof *madt; unsigned char *madt_end = (unsigned char *)madt + madt->m_base.s_length; while (p < madt_end) { struct acpi_madt_record *rec = (struct acpi_madt_record *)p; struct acpi_madt_ioapic *ioapic; switch (rec->r_type) { case ACPI_MADT_IOAPIC: ioapic = (struct acpi_madt_ioapic *)(rec + 1); ioapic_init(ioapic->io_address, ioapic->io_intbase); break; default: break; } p += rec->r_length; } parse_legacy_irq_override(madt); } kern_status_t apic_init(void) { static unsigned int bsp_id = (unsigned int)-1; /* the bootstrap processor will be the first one ro call apic_init(). it is responsible for initialising the I/O APICs */ if (bsp_id == (unsigned int)-1) { bsp_id = this_cpu(); } struct acpi_madt *madt = (struct acpi_madt *)acpi_find_sdt(ACPI_SIG_MADT); if (check_apic() == 0 || !madt) { configure_legacy_pic(); return KERN_UNSUPPORTED; } if (this_cpu() == bsp_id) { init_all_ioapic(madt); } local_apic_enable(); disable_8259(); apic_enabled = 1; pit_start(10); printk("acpi: all APIC online"); return KERN_OK; } void irq_ack(unsigned int vec) { if (apic_enabled) { local_apic lapic(lapic_base); lapic.ack(); } else { if (vec >= 40) { outportb(0xA0, 0x20); } outportb(0x20, 0x20); } }