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x86_64: irq: add array of asm irq entry points

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max 🍓
2023-05-08 08:08:33 +01:00
parent 55c8918d28
commit 482e65d13d
1 changed files with 422 additions and 417 deletions
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839
arch/x86_64/irq.c
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@@ -12,6 +12,170 @@
#define MAX_ISR_HANDLERS 16 #define MAX_ISR_HANDLERS 16
extern void syscall_gate();
extern uintptr_t pf_faultptr(void);
static int_hook isr_handlers[NR_IDT_ENTRIES];
static struct queue irq_hooks[223];
static struct idt idt;
static int idt_initialised = 0;
static uintptr_t int_entry_points[NR_IDT_ENTRIES];
static void set_idt_gate(struct idt *idt, uint8_t index, uintptr_t base, uint16_t sel, uint8_t flags)
{
idt->i_entries[index].base_low = base & 0xFFFF;
idt->i_entries[index].base_middle = (base >> 16) & 0xFFFF;
idt->i_entries[index].base_high = (base >> 32) & 0xFFFFFFFF;
idt->i_entries[index].selector = sel;
idt->i_entries[index].always0 = 0;
idt->i_entries[index].present = 1;
idt->i_entries[index].dpl = 3;
idt->i_entries[index].zero = 0;
idt->i_entries[index].type = 0xE;
idt->i_entries[index].reserved = 0;
}
static void gpf_handler(struct cpu_context *regs)
{
int ext = regs->err_no & 1;
int table = (regs->err_no >> 1) & 0x03;
int index = (regs->err_no >> 3) & 0x1FFF;
panic_irq(regs, "general protection fault (%016llx %02x %02x %04x %016llx)",
regs->err_no, ext, table, index, regs->rip);
}
static void pf_handler(struct cpu_context *regs)
{
panic_irq(regs, "page fault (%016llx %016llx %016llx)", pf_faultptr(), regs->rip, regs->err_no);
}
#if 0
static void set_syscall_gate(uintptr_t rip)
{
/* sysret adds 0x10 to this to get cs, and 0x8 to get ss
* note that the CPU should force the RPL to 3 when loading
* the selector by using user_cs | 3. However, this doesn't happen
* in certain scenarios (specifically, QEMU + KVM on a Ryzen 5 1600X). */
uint64_t user_cs = 0x13;
uint64_t kernel_cs = 0x8;
uintptr_t star_reg = 0xC0000081;
uintptr_t lstar_reg = 0xC0000082;
uintptr_t sfmask_reg = 0xC0000084;
uint64_t selectors = 0;
selectors |= (user_cs) << 48;
selectors |= (kernel_cs) << 32;
/* disable interrupts */
uint64_t flag_mask = 0x200;
write_msr(star_reg, selectors);
write_msr(lstar_reg, rip);
write_msr(sfmask_reg, flag_mask);
}
#endif
static void init_pic()
{
// Remap the PIC
outportb(0x20, 0x11);
outportb(0xA0, 0x11);
outportb(0x21, 0x20);
outportb(0xA1, 0x28);
outportb(0x21, 0x04);
outportb(0xA1, 0x02);
outportb(0x21, 0x01);
outportb(0xA1, 0x01);
outportb(0x21, 0x0);
outportb(0xA1, 0x0);
isr_handlers[13] = gpf_handler;
isr_handlers[14] = pf_handler;
}
static void init_global_idt(void)
{
memset((void *)&idt.i_entries, 0, sizeof idt.i_entries);
for (int i = 0; i < NR_IDT_ENTRIES; i++) {
set_idt_gate(&idt, i, int_entry_points[i], 0x08, 0x8E);
}
init_pic();
idt_initialised = 1;
}
int idt_init(struct idt_ptr *ptr)
{
if (idt_initialised == 0) {
init_global_idt();
}
ptr->i_limit = sizeof(idt) - 1;
ptr->i_base = (uintptr_t)&idt;
return 0;
}
int idt_load(struct idt_ptr *ptr)
{
__asm__ __volatile__("lidt (%0)" ::"r" (ptr));
return 0;
}
void isr_dispatch(struct cpu_context *regs)
{
printk("received ISR#%u on CPU %u", regs->int_no, this_cpu());
int_hook h = isr_handlers[regs->int_no];
if (h) {
h(regs);
} else {
panic_irq(regs, "unhandled exception %u", regs->int_no);
}
}
void irq_dispatch(struct cpu_context *regs)
{
end_charge_period();
if (regs->int_no != IRQ0) {
printk("received IRQ#%u on CPU %u", regs->int_no - IRQ0, this_cpu());
}
irq_ack(regs->int_no);
struct queue *hooks = &irq_hooks[regs->int_no - IRQ0];
queue_foreach(struct irq_hook, hook, hooks, irq_entry) {
hook->irq_callback();
}
if (need_resched()) {
schedule(SCHED_IRQ);
}
start_charge_period();
}
void syscall_dispatch(struct cpu_context *regs)
{
}
void hook_irq(enum irq_vector vec, struct irq_hook *hook)
{
struct queue *hook_queue = &irq_hooks[vec - IRQ0];
queue_push_back(hook_queue, &hook->irq_entry);
}
void unhook_irq(enum irq_vector vec, struct irq_hook *hook)
{
struct queue *hook_queue = &irq_hooks[vec - IRQ0];
queue_delete(hook_queue, &hook->irq_entry);
}
extern void _isr0(); extern void _isr0();
extern void _isr1(); extern void _isr1();
extern void _isr2(); extern void _isr2();
@@ -270,420 +434,261 @@ extern void _irq221();
extern void _irq222(); extern void _irq222();
extern void _irq223(); extern void _irq223();
extern void syscall_gate(); static uintptr_t int_entry_points[NR_IDT_ENTRIES] = {
extern uintptr_t pf_faultptr(void); [0] = (uintptr_t)_isr0,
[1] = (uintptr_t)_isr1,
static int_hook isr_handlers[NR_IDT_ENTRIES]; [2] = (uintptr_t)_isr2,
static struct queue irq_hooks[223]; [3] = (uintptr_t)_isr3,
[4] = (uintptr_t)_isr4,
static struct idt idt; [5] = (uintptr_t)_isr5,
static int idt_initialised = 0; [6] = (uintptr_t)_isr6,
[7] = (uintptr_t)_isr7,
static void set_idt_gate(struct idt *idt, uint8_t index, uintptr_t base, uint16_t sel, uint8_t flags) [8] = (uintptr_t)_isr8,
{ [9] = (uintptr_t)_isr9,
idt->i_entries[index].base_low = base & 0xFFFF; [10] = (uintptr_t)_isr10,
idt->i_entries[index].base_middle = (base >> 16) & 0xFFFF; [11] = (uintptr_t)_isr11,
idt->i_entries[index].base_high = (base >> 32) & 0xFFFFFFFF; [12] = (uintptr_t)_isr12,
idt->i_entries[index].selector = sel; [13] = (uintptr_t)_isr13,
idt->i_entries[index].always0 = 0; [14] = (uintptr_t)_isr14,
idt->i_entries[index].present = 1; [15] = (uintptr_t)_isr15,
idt->i_entries[index].dpl = 3; [16] = (uintptr_t)_isr16,
idt->i_entries[index].zero = 0; [17] = (uintptr_t)_isr17,
idt->i_entries[index].type = 0xE; [18] = (uintptr_t)_isr18,
idt->i_entries[index].reserved = 0; [19] = (uintptr_t)_isr19,
} [20] = (uintptr_t)_isr20,
[21] = (uintptr_t)_isr21,
static void gpf_handler(struct cpu_context *regs) [22] = (uintptr_t)_isr22,
{ [23] = (uintptr_t)_isr23,
int ext = regs->err_no & 1; [24] = (uintptr_t)_isr24,
int table = (regs->err_no >> 1) & 0x03; [25] = (uintptr_t)_isr25,
int index = (regs->err_no >> 3) & 0x1FFF; [26] = (uintptr_t)_isr26,
[27] = (uintptr_t)_isr27,
panic_irq(regs, "general protection fault (%016llx %02x %02x %04x %016llx)", [28] = (uintptr_t)_isr28,
regs->err_no, ext, table, index, regs->rip); [29] = (uintptr_t)_isr29,
} [30] = (uintptr_t)_isr30,
[31] = (uintptr_t)_isr31,
static void pf_handler(struct cpu_context *regs) [32] = (uintptr_t)_irq0,
{ [33] = (uintptr_t)_irq1,
panic_irq(regs, "page fault (%016llx %016llx %016llx)", pf_faultptr(), regs->rip, regs->err_no); [34] = (uintptr_t)_irq2,
} [35] = (uintptr_t)_irq3,
[36] = (uintptr_t)_irq4,
#if 0 [37] = (uintptr_t)_irq5,
static void set_syscall_gate(uintptr_t rip) [38] = (uintptr_t)_irq6,
{ [39] = (uintptr_t)_irq7,
/* sysret adds 0x10 to this to get cs, and 0x8 to get ss [40] = (uintptr_t)_irq8,
* note that the CPU should force the RPL to 3 when loading [41] = (uintptr_t)_irq9,
* the selector by using user_cs | 3. However, this doesn't happen [42] = (uintptr_t)_irq10,
* in certain scenarios (specifically, QEMU + KVM on a Ryzen 5 1600X). */ [43] = (uintptr_t)_irq11,
uint64_t user_cs = 0x13; [44] = (uintptr_t)_irq12,
uint64_t kernel_cs = 0x8; [45] = (uintptr_t)_irq13,
[46] = (uintptr_t)_irq14,
uintptr_t star_reg = 0xC0000081; [47] = (uintptr_t)_irq15,
uintptr_t lstar_reg = 0xC0000082; [48] = (uintptr_t)_irq16,
uintptr_t sfmask_reg = 0xC0000084; [49] = (uintptr_t)_irq17,
[50] = (uintptr_t)_irq18,
uint64_t selectors = 0; [51] = (uintptr_t)_irq19,
selectors |= (user_cs) << 48; [52] = (uintptr_t)_irq20,
selectors |= (kernel_cs) << 32; [53] = (uintptr_t)_irq21,
[54] = (uintptr_t)_irq22,
/* disable interrupts */ [55] = (uintptr_t)_irq23,
uint64_t flag_mask = 0x200; [56] = (uintptr_t)_irq24,
[57] = (uintptr_t)_irq25,
write_msr(star_reg, selectors); [58] = (uintptr_t)_irq26,
write_msr(lstar_reg, rip); [59] = (uintptr_t)_irq27,
write_msr(sfmask_reg, flag_mask); [60] = (uintptr_t)_irq28,
} [61] = (uintptr_t)_irq29,
#endif [62] = (uintptr_t)_irq30,
[63] = (uintptr_t)_irq31,
static void init_pic() [64] = (uintptr_t)_irq32,
{ [65] = (uintptr_t)_irq33,
// Remap the PIC [66] = (uintptr_t)_irq34,
outportb(0x20, 0x11); [67] = (uintptr_t)_irq35,
outportb(0xA0, 0x11); [68] = (uintptr_t)_irq36,
outportb(0x21, 0x20); [69] = (uintptr_t)_irq37,
outportb(0xA1, 0x28); [70] = (uintptr_t)_irq38,
outportb(0x21, 0x04); [71] = (uintptr_t)_irq39,
outportb(0xA1, 0x02); [72] = (uintptr_t)_irq40,
outportb(0x21, 0x01); [73] = (uintptr_t)_irq41,
outportb(0xA1, 0x01); [74] = (uintptr_t)_irq42,
outportb(0x21, 0x0); [75] = (uintptr_t)_irq43,
outportb(0xA1, 0x0); [76] = (uintptr_t)_irq44,
[77] = (uintptr_t)_irq45,
isr_handlers[13] = gpf_handler; [78] = (uintptr_t)_irq46,
isr_handlers[14] = pf_handler; [79] = (uintptr_t)_irq47,
} [80] = (uintptr_t)_irq48,
[81] = (uintptr_t)_irq49,
static void init_global_idt(void) [82] = (uintptr_t)_irq50,
{ [83] = (uintptr_t)_irq51,
memset((void *)&idt.i_entries, 0, sizeof idt.i_entries); [84] = (uintptr_t)_irq52,
[85] = (uintptr_t)_irq53,
set_idt_gate(&idt, 0, (uintptr_t)_isr0, 0x08, 0x8E); [86] = (uintptr_t)_irq54,
set_idt_gate(&idt, 1, (uintptr_t)_isr1, 0x08, 0x8E); [87] = (uintptr_t)_irq55,
set_idt_gate(&idt, 2, (uintptr_t)_isr2, 0x08, 0x8E); [88] = (uintptr_t)_irq56,
set_idt_gate(&idt, 3, (uintptr_t)_isr3, 0x08, 0x8E); [89] = (uintptr_t)_irq57,
set_idt_gate(&idt, 4, (uintptr_t)_isr4, 0x08, 0x8E); [90] = (uintptr_t)_irq58,
set_idt_gate(&idt, 5, (uintptr_t)_isr5, 0x08, 0x8E); [91] = (uintptr_t)_irq59,
set_idt_gate(&idt, 6, (uintptr_t)_isr6, 0x08, 0x8E); [92] = (uintptr_t)_irq60,
set_idt_gate(&idt, 7, (uintptr_t)_isr7, 0x08, 0x8E); [93] = (uintptr_t)_irq61,
set_idt_gate(&idt, 8, (uintptr_t)_isr8, 0x08, 0x8E); [94] = (uintptr_t)_irq62,
set_idt_gate(&idt, 9, (uintptr_t)_isr9, 0x08, 0x8E); [95] = (uintptr_t)_irq63,
set_idt_gate(&idt, 10, (uintptr_t)_isr10, 0x08, 0x8E); [96] = (uintptr_t)_irq64,
set_idt_gate(&idt, 11, (uintptr_t)_isr11, 0x08, 0x8E); [97] = (uintptr_t)_irq65,
set_idt_gate(&idt, 12, (uintptr_t)_isr12, 0x08, 0x8E); [98] = (uintptr_t)_irq66,
set_idt_gate(&idt, 13, (uintptr_t)_isr13, 0x08, 0x8E); [99] = (uintptr_t)_irq67,
set_idt_gate(&idt, 14, (uintptr_t)_isr14, 0x08, 0x8E); [100] = (uintptr_t)_irq68,
set_idt_gate(&idt, 15, (uintptr_t)_isr15, 0x08, 0x8E); [101] = (uintptr_t)_irq69,
set_idt_gate(&idt, 16, (uintptr_t)_isr16, 0x08, 0x8E); [102] = (uintptr_t)_irq70,
set_idt_gate(&idt, 17, (uintptr_t)_isr17, 0x08, 0x8E); [103] = (uintptr_t)_irq71,
set_idt_gate(&idt, 18, (uintptr_t)_isr18, 0x08, 0x8E); [104] = (uintptr_t)_irq72,
set_idt_gate(&idt, 19, (uintptr_t)_isr19, 0x08, 0x8E); [105] = (uintptr_t)_irq73,
set_idt_gate(&idt, 20, (uintptr_t)_isr20, 0x08, 0x8E); [106] = (uintptr_t)_irq74,
set_idt_gate(&idt, 21, (uintptr_t)_isr21, 0x08, 0x8E); [107] = (uintptr_t)_irq75,
set_idt_gate(&idt, 22, (uintptr_t)_isr22, 0x08, 0x8E); [108] = (uintptr_t)_irq76,
set_idt_gate(&idt, 23, (uintptr_t)_isr23, 0x08, 0x8E); [109] = (uintptr_t)_irq77,
set_idt_gate(&idt, 24, (uintptr_t)_isr24, 0x08, 0x8E); [110] = (uintptr_t)_irq78,
set_idt_gate(&idt, 25, (uintptr_t)_isr25, 0x08, 0x8E); [111] = (uintptr_t)_irq79,
set_idt_gate(&idt, 26, (uintptr_t)_isr26, 0x08, 0x8E); [112] = (uintptr_t)_irq80,
set_idt_gate(&idt, 27, (uintptr_t)_isr27, 0x08, 0x8E); [113] = (uintptr_t)_irq81,
set_idt_gate(&idt, 28, (uintptr_t)_isr28, 0x08, 0x8E); [114] = (uintptr_t)_irq82,
set_idt_gate(&idt, 29, (uintptr_t)_isr29, 0x08, 0x8E); [115] = (uintptr_t)_irq83,
set_idt_gate(&idt, 30, (uintptr_t)_isr30, 0x08, 0x8E); [116] = (uintptr_t)_irq84,
set_idt_gate(&idt, 31, (uintptr_t)_isr31, 0x08, 0x8E); [117] = (uintptr_t)_irq85,
[118] = (uintptr_t)_irq86,
init_pic(); [119] = (uintptr_t)_irq87,
[120] = (uintptr_t)_irq88,
// Install the IRQs [121] = (uintptr_t)_irq89,
set_idt_gate(&idt, 32, (uintptr_t)_irq0, 0x08, 0x8E); [122] = (uintptr_t)_irq90,
set_idt_gate(&idt, 33, (uintptr_t)_irq1, 0x08, 0x8E); [123] = (uintptr_t)_irq91,
set_idt_gate(&idt, 34, (uintptr_t)_irq2, 0x08, 0x8E); [124] = (uintptr_t)_irq92,
set_idt_gate(&idt, 35, (uintptr_t)_irq3, 0x08, 0x8E); [125] = (uintptr_t)_irq93,
set_idt_gate(&idt, 36, (uintptr_t)_irq4, 0x08, 0x8E); [126] = (uintptr_t)_irq94,
set_idt_gate(&idt, 37, (uintptr_t)_irq5, 0x08, 0x8E); [127] = (uintptr_t)_irq95,
set_idt_gate(&idt, 38, (uintptr_t)_irq6, 0x08, 0x8E); [128] = (uintptr_t)_irq96,
set_idt_gate(&idt, 39, (uintptr_t)_irq7, 0x08, 0x8E); [129] = (uintptr_t)_irq97,
set_idt_gate(&idt, 40, (uintptr_t)_irq8, 0x08, 0x8E); [130] = (uintptr_t)_irq98,
set_idt_gate(&idt, 41, (uintptr_t)_irq9, 0x08, 0x8E); [131] = (uintptr_t)_irq99,
set_idt_gate(&idt, 42, (uintptr_t)_irq10, 0x08, 0x8E); [132] = (uintptr_t)_irq100,
set_idt_gate(&idt, 43, (uintptr_t)_irq11, 0x08, 0x8E); [133] = (uintptr_t)_irq101,
set_idt_gate(&idt, 44, (uintptr_t)_irq12, 0x08, 0x8E); [134] = (uintptr_t)_irq102,
set_idt_gate(&idt, 45, (uintptr_t)_irq13, 0x08, 0x8E); [135] = (uintptr_t)_irq103,
set_idt_gate(&idt, 46, (uintptr_t)_irq14, 0x08, 0x8E); [136] = (uintptr_t)_irq104,
set_idt_gate(&idt, 47, (uintptr_t)_irq15, 0x08, 0x8E); [137] = (uintptr_t)_irq105,
set_idt_gate(&idt, 48, (uintptr_t)_irq16, 0x08, 0x8E); [138] = (uintptr_t)_irq106,
set_idt_gate(&idt, 49, (uintptr_t)_irq17, 0x08, 0x8E); [139] = (uintptr_t)_irq107,
set_idt_gate(&idt, 50, (uintptr_t)_irq18, 0x08, 0x8E); [140] = (uintptr_t)_irq108,
set_idt_gate(&idt, 51, (uintptr_t)_irq19, 0x08, 0x8E); [141] = (uintptr_t)_irq109,
set_idt_gate(&idt, 52, (uintptr_t)_irq20, 0x08, 0x8E); [142] = (uintptr_t)_irq110,
set_idt_gate(&idt, 53, (uintptr_t)_irq21, 0x08, 0x8E); [143] = (uintptr_t)_irq111,
set_idt_gate(&idt, 54, (uintptr_t)_irq22, 0x08, 0x8E); [144] = (uintptr_t)_irq112,
set_idt_gate(&idt, 55, (uintptr_t)_irq23, 0x08, 0x8E); [145] = (uintptr_t)_irq113,
set_idt_gate(&idt, 56, (uintptr_t)_irq24, 0x08, 0x8E); [146] = (uintptr_t)_irq114,
set_idt_gate(&idt, 57, (uintptr_t)_irq25, 0x08, 0x8E); [147] = (uintptr_t)_irq115,
set_idt_gate(&idt, 58, (uintptr_t)_irq26, 0x08, 0x8E); [148] = (uintptr_t)_irq116,
set_idt_gate(&idt, 59, (uintptr_t)_irq27, 0x08, 0x8E); [149] = (uintptr_t)_irq117,
set_idt_gate(&idt, 60, (uintptr_t)_irq28, 0x08, 0x8E); [150] = (uintptr_t)_irq118,
set_idt_gate(&idt, 61, (uintptr_t)_irq29, 0x08, 0x8E); [151] = (uintptr_t)_irq119,
set_idt_gate(&idt, 62, (uintptr_t)_irq30, 0x08, 0x8E); [152] = (uintptr_t)_irq120,
set_idt_gate(&idt, 63, (uintptr_t)_irq31, 0x08, 0x8E); [153] = (uintptr_t)_irq121,
set_idt_gate(&idt, 64, (uintptr_t)_irq32, 0x08, 0x8E); [154] = (uintptr_t)_irq122,
set_idt_gate(&idt, 65, (uintptr_t)_irq33, 0x08, 0x8E); [155] = (uintptr_t)_irq123,
set_idt_gate(&idt, 66, (uintptr_t)_irq34, 0x08, 0x8E); [156] = (uintptr_t)_irq124,
set_idt_gate(&idt, 67, (uintptr_t)_irq35, 0x08, 0x8E); [157] = (uintptr_t)_irq125,
set_idt_gate(&idt, 68, (uintptr_t)_irq36, 0x08, 0x8E); [158] = (uintptr_t)_irq126,
set_idt_gate(&idt, 69, (uintptr_t)_irq37, 0x08, 0x8E); [159] = (uintptr_t)_irq127,
set_idt_gate(&idt, 70, (uintptr_t)_irq38, 0x08, 0x8E); [160] = (uintptr_t)_irq128,
set_idt_gate(&idt, 71, (uintptr_t)_irq39, 0x08, 0x8E); [161] = (uintptr_t)_irq129,
set_idt_gate(&idt, 72, (uintptr_t)_irq40, 0x08, 0x8E); [162] = (uintptr_t)_irq130,
set_idt_gate(&idt, 73, (uintptr_t)_irq41, 0x08, 0x8E); [163] = (uintptr_t)_irq131,
set_idt_gate(&idt, 74, (uintptr_t)_irq42, 0x08, 0x8E); [164] = (uintptr_t)_irq132,
set_idt_gate(&idt, 75, (uintptr_t)_irq43, 0x08, 0x8E); [165] = (uintptr_t)_irq133,
set_idt_gate(&idt, 76, (uintptr_t)_irq44, 0x08, 0x8E); [166] = (uintptr_t)_irq134,
set_idt_gate(&idt, 77, (uintptr_t)_irq45, 0x08, 0x8E); [167] = (uintptr_t)_irq135,
set_idt_gate(&idt, 78, (uintptr_t)_irq46, 0x08, 0x8E); [168] = (uintptr_t)_irq136,
set_idt_gate(&idt, 79, (uintptr_t)_irq47, 0x08, 0x8E); [169] = (uintptr_t)_irq137,
set_idt_gate(&idt, 80, (uintptr_t)_irq48, 0x08, 0x8E); [170] = (uintptr_t)_irq138,
set_idt_gate(&idt, 81, (uintptr_t)_irq49, 0x08, 0x8E); [171] = (uintptr_t)_irq139,
set_idt_gate(&idt, 82, (uintptr_t)_irq50, 0x08, 0x8E); [172] = (uintptr_t)_irq140,
set_idt_gate(&idt, 83, (uintptr_t)_irq51, 0x08, 0x8E); [173] = (uintptr_t)_irq141,
set_idt_gate(&idt, 84, (uintptr_t)_irq52, 0x08, 0x8E); [174] = (uintptr_t)_irq142,
set_idt_gate(&idt, 85, (uintptr_t)_irq53, 0x08, 0x8E); [175] = (uintptr_t)_irq143,
set_idt_gate(&idt, 86, (uintptr_t)_irq54, 0x08, 0x8E); [176] = (uintptr_t)_irq144,
set_idt_gate(&idt, 87, (uintptr_t)_irq55, 0x08, 0x8E); [177] = (uintptr_t)_irq145,
set_idt_gate(&idt, 88, (uintptr_t)_irq56, 0x08, 0x8E); [178] = (uintptr_t)_irq146,
set_idt_gate(&idt, 89, (uintptr_t)_irq57, 0x08, 0x8E); [179] = (uintptr_t)_irq147,
set_idt_gate(&idt, 90, (uintptr_t)_irq58, 0x08, 0x8E); [180] = (uintptr_t)_irq148,
set_idt_gate(&idt, 91, (uintptr_t)_irq59, 0x08, 0x8E); [181] = (uintptr_t)_irq149,
set_idt_gate(&idt, 92, (uintptr_t)_irq60, 0x08, 0x8E); [182] = (uintptr_t)_irq150,
set_idt_gate(&idt, 93, (uintptr_t)_irq61, 0x08, 0x8E); [183] = (uintptr_t)_irq151,
set_idt_gate(&idt, 94, (uintptr_t)_irq62, 0x08, 0x8E); [184] = (uintptr_t)_irq152,
set_idt_gate(&idt, 95, (uintptr_t)_irq63, 0x08, 0x8E); [185] = (uintptr_t)_irq153,
set_idt_gate(&idt, 96, (uintptr_t)_irq64, 0x08, 0x8E); [186] = (uintptr_t)_irq154,
set_idt_gate(&idt, 97, (uintptr_t)_irq65, 0x08, 0x8E); [187] = (uintptr_t)_irq155,
set_idt_gate(&idt, 98, (uintptr_t)_irq66, 0x08, 0x8E); [188] = (uintptr_t)_irq156,
set_idt_gate(&idt, 99, (uintptr_t)_irq67, 0x08, 0x8E); [189] = (uintptr_t)_irq157,
set_idt_gate(&idt, 100, (uintptr_t)_irq68, 0x08, 0x8E); [190] = (uintptr_t)_irq158,
set_idt_gate(&idt, 101, (uintptr_t)_irq69, 0x08, 0x8E); [191] = (uintptr_t)_irq159,
set_idt_gate(&idt, 102, (uintptr_t)_irq70, 0x08, 0x8E); [192] = (uintptr_t)_irq160,
set_idt_gate(&idt, 103, (uintptr_t)_irq71, 0x08, 0x8E); [193] = (uintptr_t)_irq161,
set_idt_gate(&idt, 104, (uintptr_t)_irq72, 0x08, 0x8E); [194] = (uintptr_t)_irq162,
set_idt_gate(&idt, 105, (uintptr_t)_irq73, 0x08, 0x8E); [195] = (uintptr_t)_irq163,
set_idt_gate(&idt, 106, (uintptr_t)_irq74, 0x08, 0x8E); [196] = (uintptr_t)_irq164,
set_idt_gate(&idt, 107, (uintptr_t)_irq75, 0x08, 0x8E); [197] = (uintptr_t)_irq165,
set_idt_gate(&idt, 108, (uintptr_t)_irq76, 0x08, 0x8E); [198] = (uintptr_t)_irq166,
set_idt_gate(&idt, 109, (uintptr_t)_irq77, 0x08, 0x8E); [199] = (uintptr_t)_irq167,
set_idt_gate(&idt, 110, (uintptr_t)_irq78, 0x08, 0x8E); [200] = (uintptr_t)_irq168,
set_idt_gate(&idt, 111, (uintptr_t)_irq79, 0x08, 0x8E); [201] = (uintptr_t)_irq169,
set_idt_gate(&idt, 112, (uintptr_t)_irq80, 0x08, 0x8E); [202] = (uintptr_t)_irq170,
set_idt_gate(&idt, 113, (uintptr_t)_irq81, 0x08, 0x8E); [203] = (uintptr_t)_irq171,
set_idt_gate(&idt, 114, (uintptr_t)_irq82, 0x08, 0x8E); [204] = (uintptr_t)_irq172,
set_idt_gate(&idt, 115, (uintptr_t)_irq83, 0x08, 0x8E); [205] = (uintptr_t)_irq173,
set_idt_gate(&idt, 116, (uintptr_t)_irq84, 0x08, 0x8E); [206] = (uintptr_t)_irq174,
set_idt_gate(&idt, 117, (uintptr_t)_irq85, 0x08, 0x8E); [207] = (uintptr_t)_irq175,
set_idt_gate(&idt, 118, (uintptr_t)_irq86, 0x08, 0x8E); [208] = (uintptr_t)_irq176,
set_idt_gate(&idt, 119, (uintptr_t)_irq87, 0x08, 0x8E); [209] = (uintptr_t)_irq177,
set_idt_gate(&idt, 120, (uintptr_t)_irq88, 0x08, 0x8E); [210] = (uintptr_t)_irq178,
set_idt_gate(&idt, 121, (uintptr_t)_irq89, 0x08, 0x8E); [211] = (uintptr_t)_irq179,
set_idt_gate(&idt, 122, (uintptr_t)_irq90, 0x08, 0x8E); [212] = (uintptr_t)_irq180,
set_idt_gate(&idt, 123, (uintptr_t)_irq91, 0x08, 0x8E); [213] = (uintptr_t)_irq181,
set_idt_gate(&idt, 124, (uintptr_t)_irq92, 0x08, 0x8E); [214] = (uintptr_t)_irq182,
set_idt_gate(&idt, 125, (uintptr_t)_irq93, 0x08, 0x8E); [215] = (uintptr_t)_irq183,
set_idt_gate(&idt, 126, (uintptr_t)_irq94, 0x08, 0x8E); [216] = (uintptr_t)_irq184,
set_idt_gate(&idt, 127, (uintptr_t)_irq95, 0x08, 0x8E); [217] = (uintptr_t)_irq185,
set_idt_gate(&idt, 128, (uintptr_t)_irq96, 0x08, 0x8E); [218] = (uintptr_t)_irq186,
set_idt_gate(&idt, 129, (uintptr_t)_irq97, 0x08, 0x8E); [219] = (uintptr_t)_irq187,
set_idt_gate(&idt, 130, (uintptr_t)_irq98, 0x08, 0x8E); [220] = (uintptr_t)_irq188,
set_idt_gate(&idt, 131, (uintptr_t)_irq99, 0x08, 0x8E); [221] = (uintptr_t)_irq189,
set_idt_gate(&idt, 132, (uintptr_t)_irq100, 0x08, 0x8E); [222] = (uintptr_t)_irq190,
set_idt_gate(&idt, 133, (uintptr_t)_irq101, 0x08, 0x8E); [223] = (uintptr_t)_irq191,
set_idt_gate(&idt, 134, (uintptr_t)_irq102, 0x08, 0x8E); [224] = (uintptr_t)_irq192,
set_idt_gate(&idt, 135, (uintptr_t)_irq103, 0x08, 0x8E); [225] = (uintptr_t)_irq193,
set_idt_gate(&idt, 136, (uintptr_t)_irq104, 0x08, 0x8E); [226] = (uintptr_t)_irq194,
set_idt_gate(&idt, 137, (uintptr_t)_irq105, 0x08, 0x8E); [227] = (uintptr_t)_irq195,
set_idt_gate(&idt, 138, (uintptr_t)_irq106, 0x08, 0x8E); [228] = (uintptr_t)_irq196,
set_idt_gate(&idt, 139, (uintptr_t)_irq107, 0x08, 0x8E); [229] = (uintptr_t)_irq197,
set_idt_gate(&idt, 140, (uintptr_t)_irq108, 0x08, 0x8E); [230] = (uintptr_t)_irq198,
set_idt_gate(&idt, 141, (uintptr_t)_irq109, 0x08, 0x8E); [231] = (uintptr_t)_irq199,
set_idt_gate(&idt, 142, (uintptr_t)_irq110, 0x08, 0x8E); [232] = (uintptr_t)_irq200,
set_idt_gate(&idt, 143, (uintptr_t)_irq111, 0x08, 0x8E); [233] = (uintptr_t)_irq201,
set_idt_gate(&idt, 144, (uintptr_t)_irq112, 0x08, 0x8E); [234] = (uintptr_t)_irq202,
set_idt_gate(&idt, 145, (uintptr_t)_irq113, 0x08, 0x8E); [235] = (uintptr_t)_irq203,
set_idt_gate(&idt, 146, (uintptr_t)_irq114, 0x08, 0x8E); [236] = (uintptr_t)_irq204,
set_idt_gate(&idt, 147, (uintptr_t)_irq115, 0x08, 0x8E); [237] = (uintptr_t)_irq205,
set_idt_gate(&idt, 148, (uintptr_t)_irq116, 0x08, 0x8E); [238] = (uintptr_t)_irq206,
set_idt_gate(&idt, 149, (uintptr_t)_irq117, 0x08, 0x8E); [239] = (uintptr_t)_irq207,
set_idt_gate(&idt, 150, (uintptr_t)_irq118, 0x08, 0x8E); [240] = (uintptr_t)_irq208,
set_idt_gate(&idt, 151, (uintptr_t)_irq119, 0x08, 0x8E); [241] = (uintptr_t)_irq209,
set_idt_gate(&idt, 152, (uintptr_t)_irq120, 0x08, 0x8E); [242] = (uintptr_t)_irq210,
set_idt_gate(&idt, 153, (uintptr_t)_irq121, 0x08, 0x8E); [243] = (uintptr_t)_irq211,
set_idt_gate(&idt, 154, (uintptr_t)_irq122, 0x08, 0x8E); [244] = (uintptr_t)_irq212,
set_idt_gate(&idt, 155, (uintptr_t)_irq123, 0x08, 0x8E); [245] = (uintptr_t)_irq213,
set_idt_gate(&idt, 156, (uintptr_t)_irq124, 0x08, 0x8E); [246] = (uintptr_t)_irq214,
set_idt_gate(&idt, 157, (uintptr_t)_irq125, 0x08, 0x8E); [247] = (uintptr_t)_irq215,
set_idt_gate(&idt, 158, (uintptr_t)_irq126, 0x08, 0x8E); [248] = (uintptr_t)_irq216,
set_idt_gate(&idt, 159, (uintptr_t)_irq127, 0x08, 0x8E); [249] = (uintptr_t)_irq217,
set_idt_gate(&idt, 160, (uintptr_t)_irq128, 0x08, 0x8E); [250] = (uintptr_t)_irq218,
set_idt_gate(&idt, 161, (uintptr_t)_irq129, 0x08, 0x8E); [251] = (uintptr_t)_irq219,
set_idt_gate(&idt, 162, (uintptr_t)_irq130, 0x08, 0x8E); [252] = (uintptr_t)_irq220,
set_idt_gate(&idt, 163, (uintptr_t)_irq131, 0x08, 0x8E); [253] = (uintptr_t)_irq221,
set_idt_gate(&idt, 164, (uintptr_t)_irq132, 0x08, 0x8E); [254] = (uintptr_t)_irq222,
set_idt_gate(&idt, 165, (uintptr_t)_irq133, 0x08, 0x8E); [255] = (uintptr_t)_irq223,
set_idt_gate(&idt, 166, (uintptr_t)_irq134, 0x08, 0x8E); };
set_idt_gate(&idt, 167, (uintptr_t)_irq135, 0x08, 0x8E);
set_idt_gate(&idt, 168, (uintptr_t)_irq136, 0x08, 0x8E);
set_idt_gate(&idt, 169, (uintptr_t)_irq137, 0x08, 0x8E);
set_idt_gate(&idt, 170, (uintptr_t)_irq138, 0x08, 0x8E);
set_idt_gate(&idt, 171, (uintptr_t)_irq139, 0x08, 0x8E);
set_idt_gate(&idt, 172, (uintptr_t)_irq140, 0x08, 0x8E);
set_idt_gate(&idt, 173, (uintptr_t)_irq141, 0x08, 0x8E);
set_idt_gate(&idt, 174, (uintptr_t)_irq142, 0x08, 0x8E);
set_idt_gate(&idt, 175, (uintptr_t)_irq143, 0x08, 0x8E);
set_idt_gate(&idt, 176, (uintptr_t)_irq144, 0x08, 0x8E);
set_idt_gate(&idt, 177, (uintptr_t)_irq145, 0x08, 0x8E);
set_idt_gate(&idt, 178, (uintptr_t)_irq146, 0x08, 0x8E);
set_idt_gate(&idt, 179, (uintptr_t)_irq147, 0x08, 0x8E);
set_idt_gate(&idt, 180, (uintptr_t)_irq148, 0x08, 0x8E);
set_idt_gate(&idt, 181, (uintptr_t)_irq149, 0x08, 0x8E);
set_idt_gate(&idt, 182, (uintptr_t)_irq150, 0x08, 0x8E);
set_idt_gate(&idt, 183, (uintptr_t)_irq151, 0x08, 0x8E);
set_idt_gate(&idt, 184, (uintptr_t)_irq152, 0x08, 0x8E);
set_idt_gate(&idt, 185, (uintptr_t)_irq153, 0x08, 0x8E);
set_idt_gate(&idt, 186, (uintptr_t)_irq154, 0x08, 0x8E);
set_idt_gate(&idt, 187, (uintptr_t)_irq155, 0x08, 0x8E);
set_idt_gate(&idt, 188, (uintptr_t)_irq156, 0x08, 0x8E);
set_idt_gate(&idt, 189, (uintptr_t)_irq157, 0x08, 0x8E);
set_idt_gate(&idt, 190, (uintptr_t)_irq158, 0x08, 0x8E);
set_idt_gate(&idt, 191, (uintptr_t)_irq159, 0x08, 0x8E);
set_idt_gate(&idt, 192, (uintptr_t)_irq160, 0x08, 0x8E);
set_idt_gate(&idt, 193, (uintptr_t)_irq161, 0x08, 0x8E);
set_idt_gate(&idt, 194, (uintptr_t)_irq162, 0x08, 0x8E);
set_idt_gate(&idt, 195, (uintptr_t)_irq163, 0x08, 0x8E);
set_idt_gate(&idt, 196, (uintptr_t)_irq164, 0x08, 0x8E);
set_idt_gate(&idt, 197, (uintptr_t)_irq165, 0x08, 0x8E);
set_idt_gate(&idt, 198, (uintptr_t)_irq166, 0x08, 0x8E);
set_idt_gate(&idt, 199, (uintptr_t)_irq167, 0x08, 0x8E);
set_idt_gate(&idt, 200, (uintptr_t)_irq168, 0x08, 0x8E);
set_idt_gate(&idt, 201, (uintptr_t)_irq169, 0x08, 0x8E);
set_idt_gate(&idt, 202, (uintptr_t)_irq170, 0x08, 0x8E);
set_idt_gate(&idt, 203, (uintptr_t)_irq171, 0x08, 0x8E);
set_idt_gate(&idt, 204, (uintptr_t)_irq172, 0x08, 0x8E);
set_idt_gate(&idt, 205, (uintptr_t)_irq173, 0x08, 0x8E);
set_idt_gate(&idt, 206, (uintptr_t)_irq174, 0x08, 0x8E);
set_idt_gate(&idt, 207, (uintptr_t)_irq175, 0x08, 0x8E);
set_idt_gate(&idt, 208, (uintptr_t)_irq176, 0x08, 0x8E);
set_idt_gate(&idt, 209, (uintptr_t)_irq177, 0x08, 0x8E);
set_idt_gate(&idt, 210, (uintptr_t)_irq178, 0x08, 0x8E);
set_idt_gate(&idt, 211, (uintptr_t)_irq179, 0x08, 0x8E);
set_idt_gate(&idt, 212, (uintptr_t)_irq180, 0x08, 0x8E);
set_idt_gate(&idt, 213, (uintptr_t)_irq181, 0x08, 0x8E);
set_idt_gate(&idt, 214, (uintptr_t)_irq182, 0x08, 0x8E);
set_idt_gate(&idt, 215, (uintptr_t)_irq183, 0x08, 0x8E);
set_idt_gate(&idt, 216, (uintptr_t)_irq184, 0x08, 0x8E);
set_idt_gate(&idt, 217, (uintptr_t)_irq185, 0x08, 0x8E);
set_idt_gate(&idt, 218, (uintptr_t)_irq186, 0x08, 0x8E);
set_idt_gate(&idt, 219, (uintptr_t)_irq187, 0x08, 0x8E);
set_idt_gate(&idt, 220, (uintptr_t)_irq188, 0x08, 0x8E);
set_idt_gate(&idt, 221, (uintptr_t)_irq189, 0x08, 0x8E);
set_idt_gate(&idt, 222, (uintptr_t)_irq190, 0x08, 0x8E);
set_idt_gate(&idt, 223, (uintptr_t)_irq191, 0x08, 0x8E);
set_idt_gate(&idt, 224, (uintptr_t)_irq192, 0x08, 0x8E);
set_idt_gate(&idt, 225, (uintptr_t)_irq193, 0x08, 0x8E);
set_idt_gate(&idt, 226, (uintptr_t)_irq194, 0x08, 0x8E);
set_idt_gate(&idt, 227, (uintptr_t)_irq195, 0x08, 0x8E);
set_idt_gate(&idt, 228, (uintptr_t)_irq196, 0x08, 0x8E);
set_idt_gate(&idt, 229, (uintptr_t)_irq197, 0x08, 0x8E);
set_idt_gate(&idt, 230, (uintptr_t)_irq198, 0x08, 0x8E);
set_idt_gate(&idt, 231, (uintptr_t)_irq199, 0x08, 0x8E);
set_idt_gate(&idt, 232, (uintptr_t)_irq200, 0x08, 0x8E);
set_idt_gate(&idt, 233, (uintptr_t)_irq201, 0x08, 0x8E);
set_idt_gate(&idt, 234, (uintptr_t)_irq202, 0x08, 0x8E);
set_idt_gate(&idt, 235, (uintptr_t)_irq203, 0x08, 0x8E);
set_idt_gate(&idt, 236, (uintptr_t)_irq204, 0x08, 0x8E);
set_idt_gate(&idt, 237, (uintptr_t)_irq205, 0x08, 0x8E);
set_idt_gate(&idt, 238, (uintptr_t)_irq206, 0x08, 0x8E);
set_idt_gate(&idt, 239, (uintptr_t)_irq207, 0x08, 0x8E);
set_idt_gate(&idt, 240, (uintptr_t)_irq208, 0x08, 0x8E);
set_idt_gate(&idt, 241, (uintptr_t)_irq209, 0x08, 0x8E);
set_idt_gate(&idt, 242, (uintptr_t)_irq210, 0x08, 0x8E);
set_idt_gate(&idt, 243, (uintptr_t)_irq211, 0x08, 0x8E);
set_idt_gate(&idt, 244, (uintptr_t)_irq212, 0x08, 0x8E);
set_idt_gate(&idt, 245, (uintptr_t)_irq213, 0x08, 0x8E);
set_idt_gate(&idt, 246, (uintptr_t)_irq214, 0x08, 0x8E);
set_idt_gate(&idt, 247, (uintptr_t)_irq215, 0x08, 0x8E);
set_idt_gate(&idt, 248, (uintptr_t)_irq216, 0x08, 0x8E);
set_idt_gate(&idt, 249, (uintptr_t)_irq217, 0x08, 0x8E);
set_idt_gate(&idt, 250, (uintptr_t)_irq218, 0x08, 0x8E);
set_idt_gate(&idt, 251, (uintptr_t)_irq219, 0x08, 0x8E);
set_idt_gate(&idt, 252, (uintptr_t)_irq220, 0x08, 0x8E);
set_idt_gate(&idt, 253, (uintptr_t)_irq221, 0x08, 0x8E);
set_idt_gate(&idt, 254, (uintptr_t)_irq222, 0x08, 0x8E);
set_idt_gate(&idt, 255, (uintptr_t)_irq223, 0x08, 0x8E);
idt_initialised = 1;
}
int idt_init(struct idt_ptr *ptr)
{
if (idt_initialised == 0) {
init_global_idt();
}
ptr->i_limit = sizeof(idt) - 1;
ptr->i_base = (uintptr_t)&idt;
return 0;
}
int idt_load(struct idt_ptr *ptr)
{
__asm__ __volatile__("lidt (%0)" ::"r" (ptr));
return 0;
}
void isr_dispatch(struct cpu_context *regs)
{
printk("received ISR#%u on CPU %u", regs->int_no, this_cpu());
int_hook h = isr_handlers[regs->int_no];
if (h) {
h(regs);
} else {
panic_irq(regs, "unhandled exception %u", regs->int_no);
}
}
void irq_dispatch(struct cpu_context *regs)
{
end_charge_period();
if (regs->int_no != IRQ0) {
printk("received IRQ#%u on CPU %u", regs->int_no, this_cpu());
}
irq_ack(regs->int_no);
struct queue *hooks = &irq_hooks[regs->int_no - IRQ0];
queue_foreach(struct irq_hook, hook, hooks, irq_entry) {
hook->irq_callback();
}
if (need_resched()) {
schedule(SCHED_IRQ);
}
start_charge_period();
}
void syscall_dispatch(struct cpu_context *regs)
{
}
void hook_irq(enum irq_vector vec, struct irq_hook *hook)
{
struct queue *hook_queue = &irq_hooks[vec - IRQ0];
queue_push_back(hook_queue, &hook->irq_entry);
}
void unhook_irq(enum irq_vector vec, struct irq_hook *hook)
{
struct queue *hook_queue = &irq_hooks[vec - IRQ0];
queue_delete(hook_queue, &hook->irq_entry);
}